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Theta Engineering did the circuit design, including the logic design of a 100K-gate Xilinx FPGA (Field Programmable Gate Array) chip, for a PCI-bus data acquisition and control card for Pacific Nanotech's line of atomic force microscopes.  This design reduced cost by replacing two off-the-shelf I/O cards.  It implements an 8-channel 16-bit 250KHz ADC (Analog to Digital Converter), 2-channel 16-bit 64KHz DAC (Digital to Analog Converter), and 128 bits of digital I/O.  It also implements specific functions needed for atomic-force microscopy allowing greater system performance while reducing the burden on the host computer. 

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 Theta Engineering  •  634 Baker Street  •  Costa Mesa, CA 92626  •  Voice: (714) 662-5954  •  Fax: (714) 662-5940